Teloquence offers a wide variety of services/solutions in the following domains domain of the Embedded system. Our engineering team has project experience in services for

• Board Support Packages (BSPs) including boot-loader, debug utilities, interrupt and error handlers and Hardware Abstraction Layer (HAL) for interoperability with kernels under various operating systems
• Device drivers for all on-board components – RTC, UART, I2C, SPI, RS-232 and Bus interfaces – PCI, ISA, PCI-X
• Drivers for external I/O interfaces, audio/ video interfaces, MMIs like LED/ LCD displays, touch screen panels; network interfaces, storage devices and flash memory
• Automotive and Automation Protocols –CAN Protocol, LIN, FlexRay, MOST, ModBus, ZigBee, Industrial Ethernet, RS422/RS845
• RTOS development

Our team has expertise in0 working with different families of microcontrollers like NXPs LPC2148 ARM7, Microchips PIC16FXXX, PIC18FXXXX, AVR 32, STM32, etc. Our engineers have good knowledge of Software development life cycle. Our team is well versed in optimizing the Software to suit different target platforms.

Some of the key industries that our engineers have worked on so far are Health care, Defence, Communications, Smart Cities, Automotive, Transportation, etc.

Teloquence offers complete physical design expertise for Block level and SoC level, from netlist to GDS including Floor Planning, Placement, Clock Tree Synthesis, Routing and Optimization, Timing closure, Signoff Checks like PV, LEC, and STA.
Our Physical Design Expertise.

• 7 nm, 14 nm advanced technology nodes experience
• High-frequency designs of sub-GHz
• Very high power chip physical design capability
• Low-power optimization flow with multi-power domains
• Physical verification, DRC, LVS with industry-standard tools
• Floor planning, place and route, timing closure, IR drop analysis

Our PNR expertise in IO Timing, Floorplanning, PG Planning, Place & Route, Clock Tree Synthesis & Post Route Optimization, is unmatched. We have strong expertise in implementing Low Power techniques related to Clock Gating, Power Gating, Multi-Vt, Voltage Islands, etc.

Our team has expertise in using technologies developed by Synopsys (ICC 2 compiler, Primetime, Design compiler) and Cadence (Innovous, Tempus, Genus).

Our engineers are available to complement your in-house design expertise or take complete ownership of your physical design requirements. We have rich experience in advanced nodes and have successfully undertaken large digital SoC/ASICs with 500M+ gates.

The Analog and Mixed-signal design team at Teloquence specializes in High-quality design for different applications with process nodes varying from 350 nm to most advanced 3nm designs. The IPs were developed for different industry verticals like Automotive, Communication, Consumer, Medical, IoT, etc.

Key Offerings

• Expertise for developing Full IP & Block level
• Expertise on CMOS/FinFET process node: 3nm, 5nm, 7nm, 10nm, 14nm, 22nm, 45nm, 65nm, 90nm, 130nm, 180nm & 350nm
• High Speed AMS Design & Layout
• RF Layout
• IO Design & Layout
• Standard Cell Design & Layout

Teloquence has proven excellence in handling turnkey design verification testing, ODCs for semiconductor product companies across the globe. Our engineers have identified 100+ defects from market-proven Design and Verification IPs. Our expertise in ARM architectures and a wider range of protocols like high-speed serial protocols (Ethernet, PCIe, USB, CXL), low-speed IOs (SPI, I2C, UART), AMBA Bus protocols (APB, AHB, AXI, ACE, CHI), and Memory controllers (DDR) help us in providing sharp focus, and efficient solutions with the shortest development cycle to meet our client’s timelines.

Key Offerings

• SoC/IP Functional Verification
• Experience on ARM Cortex series Processor verification
• RISC-V, X86 compatible processor verification
• Low Power Design Verification & Testing
• Analog Mixed Signal Verification
• Hardware/Software system design and co-verification
• SystemC /TLM Modelling
• Formal Verification
• Pre-Silicon and Post-Silicon Validation/Verification

Process, Methodologies, Tools

• Mixed language (Verilog, VHDL, SystemVerilog, SystemC)
• Uniform language and methodology (UVM)
• VCS, IUS, Questa
• UVM, OVM, VMM, eRM

Teloquence offers following services in FPGA

Key Offerings

• RTL implementation leveraging expertise in Design languages including VHDL, Verilog, and SystemVerilog.
• Custom IP development and Interfacing the IP cores
• Xilinx SDK embedded application development on microprocessors: Zynq-7000 SoCs and Zynq UltraScale+ MPSoC.
• System debugging support in MicroBlaze cores, Zynq-7000 SoCs and Zynq UltraScale+ MPSoC.

Teloquence offers complete design expertise in IP/SoC/Subsystem, including Development of Micro-architecture, RTL Design, Linting, CDC, LEC & Synthesis.

Teloquence has extensive experience in developing complex Design IPs, Subsystems, and SoCs. We offer diverse expertise in various industry verticals, such as Processors, Mobile Communications, IoT, 5G, and Multimedia.

Our team of Design experts handled many complex tapeouts with expertise in IP Design, and SoC Integration.

• RTL implementation leveraging expertise in Design languages including VHDL, Verilog, and SystemVerilog.
• Setting up Linting and CDC flows with prominent industry tools including Spyglass.
• Setting up GLS flows and debugging issues including X-propagation issues.
• Expertise in Synthesis, Static Timing Analysis (STA), and LEC